Showing posts with label digital design. Show all posts
Showing posts with label digital design. Show all posts

Verilog Digital System Design with CDROM (McGraw-Hill Professional Engineering) Review

Verilog Digital System Design with CDROM (McGraw-Hill Professional Engineering)
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Verilog Digital System Design with CDROM (McGraw-Hill Professional Engineering) ReviewI have used this book in my graduate level course. As a intermediate level person, I have found this book very useful to understand the design process, simulation, synthesis and etc. I would strongly recommend this book for both beginners and intermediate level programmers, as concept of HDL is written clearly in an understandable way. A person who is interested in the Digital Circuit Design would find an excellent flow between each chapters, and informations in each chapters are described very well. On the other hand, I found that the book is kind of outdated, and someone who wants to use this book as a Reference Book may not find it useful.Verilog Digital System Design with CDROM (McGraw-Hill Professional Engineering) OverviewHardware description languages are used to design high density VLSI, allowing designers to put millions of transistors on a single substrate. Verilog is closing in on VHDL as the most popular of the hardware description languages. This is a tutorial in designing with Verilog. Each major chapter features in-depth Verilog examples of the coding described, and all the examples are assembled into a final full CPU design. The CD-ROM includes a Verilog simulator and all examples worked in the book.

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Algorithms for VLSI Design Automation Review

Algorithms for VLSI Design Automation
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Algorithms for VLSI Design Automation ReviewThis is a good book for anyone interested in learning about VLSI-related algorithms. I found the explanations easy to understand and have been able to successfully apply the algorithms in other domains.Algorithms for VLSI Design Automation OverviewModern microprocessors such as Intel's Pentium chip typically contain millions of transitors. Known generically as Very Large-Scale Integrated (VLSI) systems, the chips have a scale and complexity that has necessitated the development of CAD tools to automate their design. This book focuses on the algorithms which are the building blocks of the design automation software which generates the layout of VLSI circuits. One of the first books on the subject, this guide covers all stages of design.

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Digital VLSI Design with Verilog: A Textbook from Silicon Valley Technical Institute Review

Digital VLSI Design with Verilog: A Textbook from Silicon Valley Technical Institute
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Digital VLSI Design with Verilog: A Textbook from Silicon Valley Technical Institute ReviewVerilog is one of the key languages for chip layout. Not especially difficult, but you still have to somehow learn it. You can easily get manuals on Verilog, but those aren't well suited as a learning pedagogy. The attraction of this book is that it lays out [pun intended] just such a learning path. The chapters explain various aspects of the language. In toto, you get a pretty exposure to most of the language.
Plus, Verilog allows powerful simulations of chips. Necessary to reduce the cost of actually fabricating a functioning design. Another advantage of the book is that you learn how to use Verilog for design for testing, and for doing that testing.Digital VLSI Design with Verilog: A Textbook from Silicon Valley Technical Institute OverviewThis unique textbook is structured as a step-by-step course of study along the lines of a VLSI IC design project.In a nominal schedule of 12 weeks, two days and about 10 hours per week, the entire verilog language is presented, from the basics to everything necessary for synthesis of an entire 70,000 transistor, full-duplex serializer - deserializer, including synthesizable PLLs.Digital VLSI Design With Verilog is all an engineer needs for in-depth understanding of the verilog language: Syntax, synthesis semantics, simulation, and test. Complete solutions for the 27 labs are provided on the accompanying CD-ROM. For a reader with access to appropriate electronic design tools, all solutions can be developed, simulated, and synthesized as described in the book.A partial list of design topics includes design partitioning, hierarchy decomposition, safe coding styles, back-annotation, wrapper modules, concurrency, race conditions, assertion-based verification, clock synchronization, and design for test.Coverage of specific devices includes basic discussion and exercises on flip-flops, latches, combinational logic, muxes, counters, shift-registers, decoders, state machines, memories (including parityand ECC), FIFOs, and PLLs. Verilog specify blocks, with their path delays and timing checks, also are covered.

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VHDL: Analysis and Modeling of Digital Systems Review

VHDL: Analysis and Modeling of Digital Systems
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VHDL: Analysis and Modeling of Digital Systems ReviewBackground info:
I have been an ASIC engineer since 1986. I have designed many ASICs in Verilog and VHDL. I have 7 books on VHDL including Dr. Navabi's text.
Some of the VHDL books out there are more like cookbooks: too many code examples and not enough explanation. Navabi's book is NOT a cookbook.
Further, it is hard to do a direct comparison to other VHDL texts. In a way it would be like comparing apples and oranges. While some VHDL texts try to explain everything about VHDL, other books like Dr. Navabi's explain the more useful parts of VHDL as being used by a digital systems or ASIC designers. While other books are mostly for RTL coders with very little testbench and system level modeling info. In my opinion, test is extremely important as well as modeling at the system level. Many books out there do not do a good job on those aspects. Most books provide very brief explanations of test benches and/or system level modeling.
This book is highly useful for a digital systems design engineer or architect. This book is not only covers coding for RTL synthesis but doing the testbenches, and sytem level modeling as well. This book has a very good balance between all the main uses of the VHDL modeling langauage.
Here is my overview of the chapters :
The first two chapters provides you with a history of modeling languages and the reason VHDL was created. I recommend that you read these chapters, especially if this is your first modeling language. The chapters are not long, but it provides a very good high level overview to modeling, synthesis, and test.
Chapter three gets you up and running quickly by providing simple examples to give you a good introduction to behavioral and structural VHDL.
Chapters 4 though 9 are heart of the VHDL aspect of the book.
Chapter 4 is very important. It describes VHDL inertial and concurrent timing in great detail. In fact, I believe Dr. Navabi's book is the best available in this aspect! It is important to understand for modeling and especially testing purposes. Chapter 5 is on structural VHDL. it is a good place to start since it is the easiest to understand. Chapter 6 introduces procedures, functions, packages, generics, and configurations. I like the way this chapter is written. Other books are not as easy to read as this one. Great examples and its clearly written as is the entire book actually. Chapter 7 digs into the VHDL types, operators, and attributes. Chapter 8 covers guarding and signal resolution. It also provides a good state machine example. Once you get through Chapter 8, pat yourself on the back because you got through the hard parts of VHDL! VHDL is a harder language to learn than Verilog. But for good reason, VHDL is much more powerful and structured than Verilog in my opinion. You can code faster in Verilog, but the code is not typically as readable as VHDL. Most of the VHDL codes I have seen are much more readable. Some of the Verilog code I have seen are downright nasty looking and time consuming to interpret. Chapter 9 starts to put it (chapters 6-8) all together by more thorough examples behavioral modeling: testbenches/harnesses, arbitration/handshaking, etc.
Chapters 10-11 puts it all together with some system examples : cpu, dma, system bus modeling/timing/interfacing, etc. even memory caches! These are not complicated examples but they are real world examples. All of the techniques are still begin used today. If they were more complicated examples the book would need to be much bigger. However, these are great examples that ties everything up. Once you complete chapter 11, you are well on your way! You will have accomplished something!
Don't overlook Chapters 12 (advanced modeling) and the appendices (esp. App. B, the synthesis subset). This additional information puts Navabi's book above other VHDL books in my opinion.
Conclusion:
It is difficult to create a VHDL book to be 'the' book for all types and levels of designers and engineers (architectural, RTL coders, testbench and verification, etc.) But, in my opinion this book comes closest. I highly recommend this book! I have many books on VHDL. This book is valuable to me as a reference and has helped me tremendously - it's a keeper! All the codes work and I only found one insignificant typo. I can not say that about any of my other VHDL books. In fact, I will probably soon be getting rid of some of my VHDL books to make space on my shelves for new books. I'll be keeping Navabi's VHDL book as a permanent reference- for sure! I recommend this book for beginners because I like the way it progresses and delivers the material: in the right order and in the right amount. I recommend this book for moer advanced people as well, I am sure that it has material that is not covered in other VHDL books. And it makes a great reference as well.
P.S.
There are recent additions to VHDL that are not discussed in this book..namely VHDL-AMS, which adds analog extentions. However, it is still very young and most simulators do not support the analog extentions yet.VHDL: Analysis and Modeling of Digital Systems OverviewThe definitive guide to VHDLÑnow updated with the new VHDL93 standard! Here's the new second edition of the authoritative reference engineers need to guide them through the use of VHDL hardware description language in the analysis, simulation, and modeling of complicated microelectronic circuits. The number and depth of its relevant and practical examples and problems is what sets this edition apart from other VHDL texts. It includes extensive new material to bring the guide fully up to date with the new VHDL93 standard, including new chapters on design flow, interfacing, modeling, and timing, as well as appendixes on logic synthesis and description styles.

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The Verilog® Hardware Description Language Review

The Verilog® Hardware Description Language
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The Verilog® Hardware Description Language ReviewThis book should be used only by the experienced users that can filter out problematic sections.
Major problems:
- first chapter, "recommended" by authors for university courses, is extremely chaotic (begin..end blocks are called loops, exercises ask you to use loops before introducing them, etc.)
- cover of the latest edition claims coverage of the latest Verilog standard - unfortunately it is very poor coverage: new interesting features such as libraries and configurations are not mentioned at all!
- I had to work hard during many trainings to correct bad coding styles showing in students reading this book as their first Verilog publication
- the book is grossly overpriced...
Main advantage:
- good set of examplesThe Verilog® Hardware Description Language OverviewThis text presents the IEEE 1364-2001 standard of the Verilog language. The examples in this edition have been updated to illustrate the features of the language. A cross referenced guide to these features is provided, thus, designers already familiar with Verilog can quickly learn the features. Newcomers to the language can use it as a guide for reading "old" specifications. The book should prove to be a useful resource for engineers and students interested in describing, simulating and synthesizing digital systems. It is also ready for use in university courses, having been used for introductory logic design and simulation through advanced VLSI design courses. An appendix with tutorial help and a work-along style is keyed into the introduction for new students. Material supporting a computer-aided design course on the inner working of simulators is also included. "The Verilog TM Hardware Description Language" includes a CD containing Simucad's Silos TM 2001 Verilog Simulator, examples from the book and lecture slides. The simulator is limited in the size of descriptions it will simulate. A few of the language constructs are not recognized by this version of the simulator.

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Writing Testbenches: Functional Verification of HDL Models, Second Edition Review

Writing Testbenches: Functional Verification of HDL Models, Second Edition
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Writing Testbenches: Functional Verification of HDL Models, Second Edition ReviewThis book covers many facets of the task of creating testbenches. However, it doesn't seem to follow a very well thought out plan, and there are holes in the coverage.
Most of the book is a 'tips and tricks' coverage of how to get each language to do what it wasn't designed to do. He walks through various situations and says that something is easy to do in Specman (shows a short code fragment), but then goes into long detail in how to get around VHDL's limitations and get the same result. I realize these are probably pretty cool tricks, but not at all the approach for me (a beginner to writing sizable testbenches). If he kept up the coverage of all 4 languages throughout, it might be useful, but the focus shifts from language to language at whim. You won't learn how to write a testbench as much as you will learn some pitfalls to avoid.
One more gripe before I get to the parts I liked. Each chapter ends with a summary. The summary lists the author's favorite tricks, not a summary of the whole chapter. I found these to be not at all helpful in either deciding whether to read the chapter, or as a review of what was covered.
I did like the explanations of:
-- The importance of verification (now I know why I was hired)
-- Overview of all the lingo (I can sound like I know what I'm talking about now, even if I don't)
-- Merits of the various types of coverage (code/functional/transition ...)
-- Aspect Oriented Programming (e) and why it is useful (cool stuff!)
-- Using coverage to drive a random bench
That is only about 10% of the book, however. That 10% was really pretty good.
I see one of the other reviewers complained about lack of downloadable sourcecode. It is available at www.janick.bergeron.com/wtb along with an extensive errata list (I'd recommend taking the hour or so and marking up your book before reading).
I still give the book 3 stars, since it is the only verification book I've found, and I did really like parts of it. I read the book front to back, and would not particularly recommend this to others. Pick the parts that interest you, and skip the rest.Writing Testbenches: Functional Verification of HDL Models, Second Edition OverviewThe Second Edition of Writing Testbenches, Functional Verification of HDL Models presents the latest verification techniques to produce fully functional first silicon ASICs, systems-on-a-chip (SoC), boards and entire systems.Topics included in the new Second Edition: *Discussions on OpenVera and e; *Approaches for writing constrainable random stimulus generators; *Strategies for making testbenches self-checking; *A clear blueprint of a verification process that aims for first time success; *Recent advances in functional verification such as coverage-driven verification process; *VHDL and Verilog language semantics; *The semantics are presented in new verification-oriented languages;*Techniques for applying stimulus and monitoring the response of a design; *Behavioral modeling using non-synthesizeable constructs and coding style; *Updated for Verilog 2001.

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Verilog® Quickstart: A Practical Guide to Simulation and Synthesis in Verilog (The Springer International Series in Engineering and Computer Science) Review

Verilog® Quickstart: A Practical Guide to Simulation and Synthesis in Verilog (The Springer International Series in Engineering and Computer Science)
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Verilog® Quickstart: A Practical Guide to Simulation and Synthesis in Verilog (The Springer International Series in Engineering and Computer Science) ReviewAn excellent book for those who already understand programming and digital electronics. However, failure in some examples that could be more detailed.
I recommend to all who understand electronics and are programmers.
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Um excelente livro para quem já programa e entende de eletrônica digital. Porém, falha em alguns exemplos que poderiam ser mais detalhados.
Recomendo para todos os que entendem eletrônica e são programadores.Verilog® Quickstart: A Practical Guide to Simulation and Synthesis in Verilog (The Springer International Series in Engineering and Computer Science) OverviewFrom a review of the Second Edition 'If you are new to the field and want to know what "all this Verilog stuff is about," you've found the golden goose. The text here is straight forward, complete, and example rich -mega-multi-kudos to the author James Lee. Though not as detailed as the Verilog reference guides from Cadence, it likewise doesn't suffer from the excessive abstractness those make you wade through. This is a quick and easy read, and will serve as a desktop reference for as long as Verilog lives. Best testimonial: I'm buying my fourth and fifth copies tonight (I've loaned out/lost two of my others).' Zach Coombes, AMD

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IEC 61131-3: Programming Industrial Automation Systems: Concepts and Programming Languages, Requirements for Programming Systems, Decision-Making Aids (Book & Cdrom) Review

IEC 61131-3: Programming Industrial Automation Systems: Concepts and Programming Languages, Requirements for Programming Systems, Decision-Making Aids (Book and Cdrom)
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IEC 61131-3: Programming Industrial Automation Systems: Concepts and Programming Languages, Requirements for Programming Systems, Decision-Making Aids (Book & Cdrom) ReviewThis book is more of a general programming guide using IEC 61131-3. That's o.k. except the name implies an emphasis on industrial automation systems yet many of the examples in the book aren't examples of the typical IA system.
I was hoping for more of a detailed outline of each language in IEC 61131-3. I would have liked to have seen a composite list of each type of block available in FBD. Instead, this book uses examples of different aspects of each language and how you can leverage the power as a whole.
As a general programming book it's average. The authors try to convey what they feel is a better way to program but to each his own. It's not the way *I* program.
I don't see a real value in this book (especially for the price) because a person who is tasked to program in one of the IEC 1131 languages had better already have a good idea how to build code.IEC 61131-3: Programming Industrial Automation Systems: Concepts and Programming Languages, Requirements for Programming Systems, Decision-Making Aids (Book & Cdrom) OverviewThis practical book gives a comprehensive introduction to the concepts and languages of the new standard IEC 61131 used to program industrial control systems. A summary of the special requirements in programming industrial automation systems and the corresponding features in the IEC 61131-3 standard makes it suitable for students as well as PLC experts. The material is presented in an easy-to-understand form using numerous examples, illustrations and summary tables. There is also a purchaser's guide and two CD-ROMs containing two reduced but functional versions of programming systems. These increase the value of the book for PLC programmers and for those in charge of purchasing software in industrial companies.

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