FPGA Design: Best Practices for Team-based Design Review

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FPGA Design: Best Practices for Team-based Design ReviewI am started using FPGAs over 15 years ago, and back then, you just started writing HDL and got the thing working.
This approach simply doesn't work anymore - the FPGAs are too big, designs are much more complicated, need for design reuse, need to incorporate FPGA vendor or third party IP, incremental compilers, and so on. Plus, multi-person design teams are often the norm.
This is the first book I know of that walks you through all of these issues, and more, with common sense advice how to approach FPGA design systematically. The book is easy to read (I read the whole thing on a coast-to coast flight), and even for advanced FPGA designers or managers, I guarantee you will find some new ideas and suggestions on how to improve your design flow.
Lastly, despite the fact the author works for Altera, the book is completely nuetral on FPGA vendor choice, and doesn't make any sales pitches on behalf of Altera.FPGA Design: Best Practices for Team-based Design OverviewThis book describes best practices for successful FPGA design. It is the result of the author's meetings with hundreds of customers on the challenges facing each of their FPGA design teams. By gaining an understanding into their design environments, processes, what works and what does not work, key areas of concern in implementing system designs have been identified and a recommended design methodology to overcome these challenges has been developed. This book's content has a strong focus on design teams that are spread across sites. The goal being to increase the productivity of FPGA design teams by establishing a common methodology across design teams; enabling the exchange of design blocks across teams. overage includes the complete FPGA design flow, from the basics to advanced techniques.

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Embedded Core Design with FPGAs Review

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Embedded Core Design with FPGAs Review"Embedded Core Design with FPGAs" written by Dr. Zainalabedin Navabi is an excellent book to learn FPGA based Embedded system design. This book covers everything a person needs to know for learning FPGAs.
It explains logic design concepts first. Even if a person is very new to the digital field, he/she will be able to start right from there. Then the chapter named RTL design with Verilog, gives an opportunity to learn a hardware description language named Verilog right from this book. This chapter is so well written that no other separate book on verilog is necessary to learn.
This book explains very well how the Field Programmable Devices work. It has lots of examples to work with and program with Altera UP3 and DE2 board. These examples have made this book a unique one, because most of the books only provide examples, but this one shows how one can really use an FPGA board and provides step by step procedure to run those example in the FPGA board.
This book also has a chapter to design with Embedded processors. Embedded design steps were shown brilliantly with examples like design of a microcontroller etc.
Overall, this is a very good book on Embedded system design which covers topics like logic design to learning verilog to using FPGA boards to designing embedded processors.Embedded Core Design with FPGAs OverviewThis is a complete toolkit for designing embedded cores and utilizing those cores in an embedded system. A landmark guide in digital system design, "Embedded Core Design with FPGAs" equips today's computer engineers with everything they need to design embedded cores and apply those cores in a state-of-the-art embedded system. This practical resource brings together logic design, computer architecture, Verilog, FPGAs, Hardware/Software design, and SoCs, explaining how engineers can draw on their computer engineering background to achieve cutting-edge embedded designs.Renowned design expert and educator Zainalabedin Navabi first covers the basics of logic design, RT Level Verilog, computer architectures, and the architecture of modern field programmable devices. He then explores the design of utility cores that are used for high-level core-based designs, with specific focus on existing Altera cores. Finally, he describes higher-end design methodologies, including design of hardware/software systems, CPU configurations, embedded systems, and the utilization of various Altera Nios II processors."Embedded Core Design with FPGAs" features: a full array of design aids, including Verilog, FPLD structures, design and programming environments, and software and hardware tools; the latest embedded system design techniques, including use of high-level integrated environments, SOPC development tools, utilizing existing processor cores, and developing your own customized processor; and, a clear focus on utilizing Altera's new DE series and UP3 development boards and design software, including SOPC Builder and IDE software design environment.It helps to master every aspect of embedded core design - High-Level Hardware/Software Design Concepts: High-Level System Design Methodology; RT Level Logic Design; RT Level Verilog; Computer Hardware and Software Programming Languages; and, FPGA Architecture and Utilization. FPGA-Based Design of Embedded Cores: Implementation of Basic Interface Components; Configurable Cores; Custom Cores; CPU Cores; Core-Based System; and, Design Using Development Boards for Prototyping.System Design with Processor Cores: Design with a Customer Embedded CPU; Embedded Core DSP Application; Embedded Microcontroller with Keyboard and Display Interfaces; Using Embedded Design; Hardware and Software Tools; Nios II Processor; And, Nios II-Based Hardware/Software System Design.

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Writing Testbenches: Functional Verification of HDL Models, Second Edition Review

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Writing Testbenches: Functional Verification of HDL Models, Second Edition ReviewThis book covers many facets of the task of creating testbenches. However, it doesn't seem to follow a very well thought out plan, and there are holes in the coverage.
Most of the book is a 'tips and tricks' coverage of how to get each language to do what it wasn't designed to do. He walks through various situations and says that something is easy to do in Specman (shows a short code fragment), but then goes into long detail in how to get around VHDL's limitations and get the same result. I realize these are probably pretty cool tricks, but not at all the approach for me (a beginner to writing sizable testbenches). If he kept up the coverage of all 4 languages throughout, it might be useful, but the focus shifts from language to language at whim. You won't learn how to write a testbench as much as you will learn some pitfalls to avoid.
One more gripe before I get to the parts I liked. Each chapter ends with a summary. The summary lists the author's favorite tricks, not a summary of the whole chapter. I found these to be not at all helpful in either deciding whether to read the chapter, or as a review of what was covered.
I did like the explanations of:
-- The importance of verification (now I know why I was hired)
-- Overview of all the lingo (I can sound like I know what I'm talking about now, even if I don't)
-- Merits of the various types of coverage (code/functional/transition ...)
-- Aspect Oriented Programming (e) and why it is useful (cool stuff!)
-- Using coverage to drive a random bench
That is only about 10% of the book, however. That 10% was really pretty good.
I see one of the other reviewers complained about lack of downloadable sourcecode. It is available at www.janick.bergeron.com/wtb along with an extensive errata list (I'd recommend taking the hour or so and marking up your book before reading).
I still give the book 3 stars, since it is the only verification book I've found, and I did really like parts of it. I read the book front to back, and would not particularly recommend this to others. Pick the parts that interest you, and skip the rest.Writing Testbenches: Functional Verification of HDL Models, Second Edition OverviewThe Second Edition of Writing Testbenches, Functional Verification of HDL Models presents the latest verification techniques to produce fully functional first silicon ASICs, systems-on-a-chip (SoC), boards and entire systems.Topics included in the new Second Edition: *Discussions on OpenVera and e; *Approaches for writing constrainable random stimulus generators; *Strategies for making testbenches self-checking; *A clear blueprint of a verification process that aims for first time success; *Recent advances in functional verification such as coverage-driven verification process; *VHDL and Verilog language semantics; *The semantics are presented in new verification-oriented languages;*Techniques for applying stimulus and monitoring the response of a design; *Behavioral modeling using non-synthesizeable constructs and coding style; *Updated for Verilog 2001.

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