VHDL: A logic synthesis approach Review

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VHDL: A logic synthesis approach ReviewThis book is excellent for the topic - logic sythesis. It has an introduction to VHDL, however I found that "VHDL Starters Guide" was better if you are just starting off. However at any rate this is a good book on VHDL. There is a lot of examples in the book, which makes it easy to understand and use. It does have a focus on sythesis, with such topics of optimizing your code using different tecniques. It also talks about good coding of VHDL. If you know at least some VHDL and are interested in synthesising your designs, this book should be useful for you.VHDL: A logic synthesis approach OverviewThis book is structured in a practical, example-driven, manner. The use of VHDL for constructing logic synthesisers is one of the aims of the book; the second is the application of the tools to the design process. Worked examples, questions and answers are provided together with do and don'ts of good practice. An appendix on logic design the source code are available free of charge over the Internet.

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