Advanced ASIC Chip Synthesis Using Synopsys® Design Compiler® Physical Compiler® and PrimeTime® Review

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Advanced ASIC Chip Synthesis Using Synopsys® Design Compiler® Physical Compiler® and PrimeTime® ReviewThis book is geared towards the synopsys synthesis tools (as evident in the title). It gives brief explanations about vhdl and verilog coding style (which can be found in many other books).
The actual useful part was that the book explored the commonly used synthesis commands in synopsys, and also had explanations on the steps to follow to succesfully synthesize rtl. These ideas can also be used on synthesis tools from other vendors.
This book is good for people already familiar with front end rtl design and are looking into moving to backend.Advanced ASIC Chip Synthesis Using Synopsys® Design Compiler® Physical Compiler® and PrimeTime® OverviewAdvanced ASIC Chip Synthesis: Using Synopsys DesignCompiler Physical Compiler and PrimeTime,Second Edition describes the advanced concepts and techniquesused towards ASIC chip synthesis, physical synthesis, formalverification and static timing analysis, using the Synopsys suite oftools. In addition, the entire ASIC design flow methodology targetedfor VDSM (Very-Deep-Sub-Micron) technologies is covered in detail.The emphasis of this book is on real-time application of Synopsystools, used to combat various problems seen at VDSM geometries.Readers will be exposed to an effective design methodology forhandling complex, sub-micron ASIC designs. Significance is placed onHDL coding styles, synthesis and optimization, dynamic simulation,formal verification, DFT scan insertion, links to layout, physicalsynthesis, and static timing analysis. At each step, problems relatedto each phase of the design flow are identified, with solutions andwork-around described in detail. In addition, crucial issues relatedto layout, which includes clock tree synthesis and back-endintegration (links to layout) are also discussed at length.Furthermore, the book contains in-depth discussions on the basis ofSynopsys technology libraries and HDL coding styles, targeted towardsoptimal synthesis solution. Target audiences for this book are practicing ASIC design engineersand masters level students undertaking advanced VLSI courses on ASICchip design and DFT techniques.

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